RFSoC with PYNQ: A Crash Course

9 December 2024

Abstract

Venue: The University of Sydney Business School Room 1080

Abercrombie Building H70, Corner Abercrombie Street and, Codrington St, Darlington NSW 2006

11:00 am – 1:00 pm: Registration, Lunch & FPGA Demo

1:00 pm – 4:30 pm: RFSoC Workshop

This workshop is a technical short course on AMD Radio Frequency System on Chip (RFSoC) technology, design, and applications. RFSoC is a specialist form of SoC that also includes high-speed Radio Frequency (RF) data converters (Digital-to-Analogue and Analogue-to-Digital Converters), which are capable of operating at multiple Gigasamples per
second (Gsps).

The course focuses on ‘RFSoC-PYNQ’ – the combination of RFSoC devices with the PYNQ software / hardware framework, which makes the creation of RFSoC-based systems more easily accessible. We will review the design flow and demonstrate how to create systems with RFSoC-PYNQ. Participants will also learn about the specialist Radio Frequency Data Converter (RFDC) blocks from a signal processing perspective, and understand how these can be exploited for application domains such as wireless communications, radar, instrumentation, radio astronomy, and
quantum computing.

Content Outline

The workshop intends to cover the following topics:

• Introduction to RFSoC device architecture and features.
• Introduction to the PYNQ framework.
• Design flow for developing RFSoC designs with PYNQ.
• Understanding and using the RF Data Converters.
• RFSoC with PYNQ design examples and demo.
• Application areas and research opportunities.
• How to get started; resources and other support.

Organisers

StrathSDR is the University of Strathclyde Software Defined Radio (SDR) research group.

In 2023, StrathSDR published a book “Software Defined Radio with Zynq UltraScale+ RFSoC”, in collaboration with AMD. This book is available as a free PDF download from http://www.rfsocbook.com, as well as in paperback and hardback formats from Amazon and other retailers. It is accompanied by a downloadable set of practical materials and designs, featuring PYNQ. This workshop proposal is based on the expertise developed via this book project and related research and development projects. The proposers have also presented longer-form (3 day) courses on this topic.

Organiser biographies:

• Robert (Bob) Stewart is a Professor in the Department of Electronic Engineering, University of Strathclyde. He leads the ‘StrathSDR’ team, focusing on Software Defined Radio (SDR) and next generation radio access networks using shared spectrum with Dynamic Spectrum Access (DSA). Bob has led a number of 5G testbed and trials projects, and in recent years, his interests have included the development of solutions for the media and broadcast industry with private 5G SA networks, working alongside a number of international broadcasters. Over a 30 year career so far, Bob has published 4 books and more than 200 papers and has presented many industry short courses, including at UCLA Extension in the USA. Bob is also a director of University start-up company, Neutral Wireless Ltd.
• Louise Crockett was awarded MEng (distinction) and PhD degrees in Electronic and Electrical Engineering, both from the University of Strathclyde, in 2003 and 2008, respectively. She is currently a Senior Teaching Fellow and senior member of the StrathSDR research team, where she supervises / manages researchers and key sponsored projects. Her core research interests are in the implementation of DSP systems, FPGAs and SoCs, wireless communications, and SDR. Louise has previously co-authored three books on Xilinx/AMD technology. Her teaching focuses on digital systems design targeting FPGAs and SoCs, and builds practical skills to equip graduates for roles in industry.
• Andrew Maclellan received his MEng degree (distinction) in Electronic and Electrical Engineering in 2018 from the University of Strathclyde, Glasgow, Scotland. He is currently a Researcher at the same University, working in flexible radio design using AMD RFSoC devices, while writing up his PhD thesis. His primary research interests include Deep Learning for PHY layer wireless communications, with a specific interest in inference on the AMD RFSoC. Previously, Andrew interned in the Wireless HDL Toolbox team at MathWorks Glasgow on three separate projects, and in 2020/21 he also interned with the PYNQ development team at Xilinx (now part of AMD).